Misconception is everywhere

Terms of Electronics

VCore, VDD, VDDQ, VDDR, VDIMM.. Help!	Author: W1zzard Date: May 24th 2004
What do all of these terms mean? Well, that is what this article is here to tell you.

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For overclockers

In the computer enthusiast world the terms are not fully defined. The most used meanings are following:
VCore: The core supply voltage of an 'important' chip like your CPU or GPU, usually not the Northbridge. Most frequently used to indicate CPU voltage.
VDD: The supply voltage to your Northbridge chip or the supply voltage for the input buffers and core logic of your memory chips (mostly on graphic cards).
VDDQ: The supply voltage to the output buffers of a memory chip.
VTT: Tracking Termination Voltage. Compared to VREF to determine Hi/Lo
VMem: Supply voltage to a memory chip.
VDDR, VDimm: Supply voltage to the memory on your motherboard.
VRef: Reference voltage for the input lines of a chip that determines the voltage level at which the threshold between a logical 1 and a logical 0 occurs. Usually 1/2 VDDQ.
VGPU: The supply voltage to your graphic card's processor.

Terms used by ATI internally:

VDDC: GPU Voltage
MVDDC: Memory Core Logic Voltage
MVDDQ: Memory Voltage supplied to the output buffers of the video card memory.
VTT: Termination Tracking voltage for video card memory.

Electrical Engineering Information

Positive voltages:
Vcc- Positive supply voltage of a Bipolar Junction Transistor.
Vdd- Positive supply voltage of A Field Effect Transistor

Negative voltages/ground:
Vee- Negative supply voltage of a Bipolar Junction Transistor.
Vss- Negative supply voltage of A Field Effect Transistor.

The letters c,d,e and s originated from the name of the legs of the transistors Collector, Drain, Emitter and Source.

The absolute distinctions between these common supply terms has since been blurred by the interchangeable application of TTL and CMOS logic families. Most CMOS (74HC / AC, etc.) IC data sheets now use Vcc and Gnd to designate the positive and negative supply pins.

The doubled suffix indicates that the voltage is "common", i.e. it is the supply voltage to one or more collectors (in the case of cc) and not just the voltage at a specific collector. Similarily, Vee is a common voltage for all emitters etc.

What is buffer, core?

A temporary storage area, usually in RAM. The purpose of most buffers is to act as a holding area, enabling the CPU to manipulate data before transferring it to a device.

在数据传输中，用来弥补不同数据处理速率速度差距的存储装置叫做缓冲器。把数据存放到缓冲器中的技术叫做缓冲。

A buffer is a data area shared by hardware devices or program processes that operate at different speeds or with different sets of priorities. The buffer allows each device or process to operate without being held up by the other. In order for a buffer to be effective, the size of the buffer and the algorithms for moving data into and out of the buffer need to be considered by the buffer designer. Like a cache, a buffer is a "midpoint holding place" but exists not so much to accelerate the speed of an activity as to support the coordination of separate activities.

This term is used both in programming and in hardware. In programming, buffering sometimes implies the need to screen data from its final intended place so that it can be edited or otherwise processed before being moved to a regular file or database.

CONTRIBUTORS:

Janis Small

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• Core: In digital electronics, it typically refers to a relatively large, general-purpose logic function that is used as a building block in a chip design. Examples are microprocessor, microcontroller and DSP cores. Cores may be developed internally, but are generally purchased from third-party intellectual property (IP) vendors.
• Soft Core: A block of digital logic that is designed to be implemented in an ASIC or FPGA chip. A soft core is typically delivered in RTL, which is a hardware description language that defines logic at a higher level than a "hard core," which is at the gate level. A chip design may comprises one or more soft cores combined with one or more hard cores along with other blocks of user-defined logic. Occasionally, soft cores are delivered as gate-level netlists or schematics rather than RTL.
• Soft Cores in ASICs
  For ASIC chips, the RTL soft core and other RTL associated with the design are synthesized into a gate-level netlist. Based on the netlist, the logic gates are placed and routed and then turned into photomasks to make the chip. The ultimate realization of the soft core is hardwired logic gates formed of transistors and their interconnections.
• Soft Cores in FPGAs
  With FPGAs, the resulting netlist is used to generate a configuration file that will be used to program the lookup tables and configurable logic blocks inside the device.
  
  
• Hard Core: A block of digital logic that is designed to be implemented in an ASIC or FPGA chip. A chip design may be made up of one or more hard cores combined with one or more soft cores along with other blocks of user-defined logic.
  
  For ASIC chips, a hard core is delivered as logic gates in which their physical locations relative to each other and their interconnections are predefined. This block will be treated as a "black box" by the place-and-route software that processes the entire design. The location of the block as a whole may be determined by the software, but the block's internal contents are "locked down."
  
  With FPGAs, hard cores are already physically implemented as hardwired blocks embedded into the FPGA's fabric.
• 
  
  
  How Hard Cores Fit In
  

  When used in an ASIC chip, information about the hard core is entered at various stages to make room for it before its actual layers are added. With FPGAs, floor planning is still done, but the microprocessor core and other IP blocks are already in place. Consequently, instead of a gate-level netlist, a lookup table/configurable logic block (LUT/CLB) netlist is created, and the final output for FPGAs is a configuration file rather than GDSII files.
• Die: An unpackaged, bare chip. A die is the formal term for the square of silicon containing an integrated circuit. Die is singular, and dice is plural. The terms die and chip are often used synonymously.
  
  
  
  Dice on a Wafer
  

  This picture of several dice on the wafer shows the various subsystems on each die (chip). This image is called a "beauty shot," because the different areas are colored for presentation. (Image courtesy of Texas Instruments, Inc.)
  
  

A geometrical problem

There is a geometrical problem, how to draw an equi-lateral triangle in a three-parrel plane using an unscaled ruler and compass, each vertex placed on each parrel line respectively, as shown on the left.

Solution.
Assume x2>x1>0, so b>a
By calculation,
xo=3^.5*(a-b);
yo=(a+b).

So now it is straightforward to draw the triangle, noting that how to draw 3^0.5!

The greatest moments in material science and engineering history

By http://www.materialmoments.org/vote.html

1. Periodic Table of Elements, by Dmitri Mendeleev in 1864
2. Smelt Iron, by ancient Egyptians about 3500 BC
3. Transistor, by John Bardeen, Walter H. Brattain, and William Shockley in 1948

vector-fitting technique

矢量拟合
Vector Fitting (VF) is an iterative technique to construct rational approximations based on multiple frequency domain samples, introduced by Gustavsen and Semlyen. VF is nowadays widely investigated and used in the Power Systems and Microwave Engineering communities. Numerical experiments show that VF has favorable convergence properties.

IBIS Modeling(4)

An IBIS Block Diagram

• IBIS file contains only a look-up IV/VT data table;
• IV/VT data are extracted from transistor/spice models or measurement;
• IBIS - Behavioral model, for system level simulation;
• No detailed circuit properties/process included in IBIS file;
• Useless for circuit designers;
• Much faster than Spice models in simulation;
• Accuracy......
• Timing/SSN simulation...

懒洋洋的合肥

银河公园

2007年1月8号

Fermat's Last Theorem

费马声称当n>2时，就找不到满足x^n +y^n = z^n的整数解，例如：方程式x^3 +y^3=z^3就无法找到整数解。(n=2为勾股定理)


要证明费马最後定理是正确的（即x^n + y^n = z^n 对n>3 均无正整数解）
只需证 x^4+ y^4 = z^4 和x^p+ y^p = z^p (P为奇质数)，都没有整数解。

Abandon the Traditional Medicine

[http://xys.3322.org/xys/ebooks/others/science/dajia8/zhongyi539.txt]
——迷信中医的国人对于中医的几个大误区

1. 中医是我们民族珍贵的文化遗产，是国粹。否定中医就是否定中国传统文化；
2. 中医虽不科学，但却被中国人几千年来的历史和经验证明是有效的；
3. 中医治本，西医治标
4. 中药是天然药，比西药的毒性要小得多；
5. 中医也是科学，只是与西医不同模式的科学；
6. 中医西医各有所长，中西医结合可以取长补短；
7. 中医是“墙内开花墙外香”，国内常有报道说中医虽然在国内日益萎缩但在海外却在蓬勃发展；
8. 中药便宜，西药贵

很多普通老百姓，或者没有受过高等教育的人也罢了，很多读了多年数学化学物理的人，居然也相信五行八卦阴阳是科学。典型的没有逻辑思考的表现。

在intel最后的日子

The last working day in Intel

IBIS Modeling(3)

The Origins of IBIS

• In 1991/2 PCI bus signal integrity simulations were ramping up at Intel, but no one had a PCI buffer designed yet
• SPICE models were very difficult to get in general
• We needed an easy way to do "what-if" analysis to come up with the PCI buffer specification
• Developed a behavioral buffer model in HSPICE to be able to simulate various buffer characteristics (strength, edge rate)
• The behavioral model was so successful that Intel decided to supply these to customers
  However, not all customers used HSPICE, so a tool independent model format was desirable
• Several EDA tool vendors showed interest in a common modeling format
  The IBIS open forum was formed and the first IBIS specification was written
  [From IBIS_class_2004_04_26.pdf, by Arpad, Muranyi, Intel]~

Loneliness

You may see it, but you cannot feel it.

IBIS Modeling(2)

Introduction of IBIS

Originally ibis is a word to name a kind of flying birds or sacred birds, while here IBIS is an acronym of I/O Buffer Information Specification. IBIS, proposed and applied first in Intel in 1990s, is such a behavioral model that can be simulated faster than transistor models and disclose property information to end-users. A standard IBIS file consists of several tables of data used to describe digital buffers, VI data, VT data, C-compensation data and other supplementary information (according to buffer case). Now there is a committee to set up and modify and update for IBIS standardalization (http://www.eigroup.org/ibis/default.htm).

Ibis是一种鸟的英文单词，大概是朱鹭或者别的什么长腿长嘴的鸟类。而在这里IBIS是一个缩略词，指的是输入/输出buffer的信息标准，大约在20世纪90年代时候intel开始使用IBIS模型。IBIS模型用来替代一些transistor的模型，这样作为芯片厂商就不用担心核心的工艺技术泄漏，因为IBIS模型只是一个数据表单。标志的IBIS模型一般包含VT曲线(用来描述buffer的动态特性)，VI曲线(用来描述buffer的静态特性)，C-comp(buffer的等效电容-不包含package的等效电容)以及一些附加选项。现在已经有一个为IBIS制定标准的组织。(http://www.eigroup.org/ibis/default.htm).

Modern Principal现代医学理论基础?

[现代医学理论]

1. 现代医学是建立在病原体，现代化学实验，激素论，外科手术，各种射线诊断技术，精神科学，免疫学，生物工程论，神经科学，人类基因组计划，遗传学，数学(如统计学)等等科学的基础上建立的。[http://www.biotech.org.cn/news/news/show.php?id=8157]
   
2. 西方生物医学理论是建立在近代经典物理学基础之上，研究对象属组织解剖学视野所见之实体本体，其认识论基于牛顿机械还原论，研究方法自然侧重于线性分解剖析、重复性实验和数理统计。在这样一套科学哲理指导下产生的应用基础理论，必然形成以清除组织病灶、抑制体内致病菌毒为基本特征的对抗性临床医学技术。20世纪30年代后，磺胺药及抗菌素的发明使细菌性感染得到大幅度地控制，外科手术，从普外、胸外、脑外再到断肢再植、器官移植、试管婴儿培育乃至基因重组、克隆技术……无不闪烁着科学理性的光辉，不愧为20世纪造福人类的主流医学。[http://www.phyan.com/physics_astronomy/51.html]
   .......

以上的定义或者说概念都是来自网上，不一定都具有权威性，但是可以总结一些没有疑问的定论：
传统中医的核心理论是：精、气、神、阴阳，以及五行理论
现代医学的基础理论是：现代物理，现代化学，现代数学等等科学。

Chinese Traditional Principal传统中医理论基础?

[传统中医理论基础]

1. 中醫基礎理論是指導中醫預防醫學和臨床醫學的理論基礎。包括中醫學的哲學基礎，中醫對正常人體的認識，中醫對疾病的認識，以及中醫養生和診療疾病的原則。中醫的理論基本上是以精、氣、神, 陰陽,五行學說、 臟腑辨證、氣血津液及經絡學等來說明為何人會生病，而生病要如何治療；便有四診、八綱來辨證，依據世人所熟知之李時珍所總結而著的《本草綱目》來處方。[http://www.lulala.ca/tcm/mainpage/b.html]
   
2. 中国的医学理论，自《黄帝内经》问世，已有2 500年的历史，它的生命观是建立在中国古代哲学理论“气一元论”的基础之上的，中医从一开始就把人视为天、地、生大环境中的一个子系统，研究的本体是阴阳二气(阳气与阴血)，继而引伸出气行经、血主络的经络系统与五脏六腑相生相克有机协同，构成了一套自治的整体医学理论——阴阳五行、经络藏象学说。它独尊天人相应、心身协同，融自然、生物、社会、心理、信息、证候为一体，强调局部与整体的统一协调，应用四诊(望、闻、问、切)合参配合内视法进行人体气血信息的综合演绎，实施辨证论治，创建了一套以中草药、针砭、按摩、导引为主要手段的综合自然疗法。[http://www.phyan.com/physics_astronomy/51.html]
   ............

Iatrology Principle医学理论(1)

一段时间以来,有很多人争论中医以及中药:有很多人主张中医回归民间,同时中药用现代医学理论重新研究;而也有很多人认为废除中医是闹剧,是对中华传统文化的无知.

既然有争论,那么争论的人知道自己到底在争论什么:因为发现很多人最后都不清楚什么是现代医学,什么是中医,无论反方还是正方.

首先先给出现代医学和中国传统中医各自的理论基础，至于他们(两种理论基础，而不是药品)之间是否可以相互解释，或者能否相互结合，暂时不做讨论----从最简单的模型一个个理清楚!!!!

[注]为了更明确理解和公正,所有的都从网上摘录,并给出出处,而且尽量多方面摘录.

IBIS modeling(1)

Behavioral VS Structural Modeling

1. Behavioral model is just like a black-box, the electrical parameters can be obtained at the terminals, its property follows

• black-box
• no internal information
• S-parameter and IBIS are both behavioral models

2. Structural model utilizes a lot of "structual" information

• Structual models would cover some of internal intellegent information
• Many componies would not release structural models to users or customers
• Most componies prefer behavioral models over structural models

3. Behavioral models can be extracted from structural models, by simulation or measurement.

IBIS is an acronym of I/O Buffer Information Specification.

窗外(mid-night tonight)

窗外是A4马路，每天24小时都有汽车带着巨大的噪音不知疲倦的，从上海市内跑到郊区，然后又跑回去。

What a Boring National Day

Taken in Hangzhou

Find more pictures http://www.zjhz.com/7yhh01/01hh.htm

【采桑子】·欧阳修　
荷花开后西湖好，
载酒来时，
不用旌旗，
前后红幢绿盖随。

画船撑入花深处，
香泛金卮，
烟雨微微，
一片笙歌醉里归。